Hey all,
Has anyone attempted to implement a C4FM demodulator on the Altera
Cyclone in the USRP1? Right now I’m hoping to do this to read P25
encrypted packets on the FPGA instead of on the CPU, and I wanted to
know if it was possible. If so, could anyone could point me to any sort
of examples or tutorials I could learn from to accomplish this? It would
be greatly appreciated.
Much obliged,
Kevin